Staff Engineer – Microcontroller RTL Design & Integration

Job Description

Our client is a global Semiconductor leader and premier R&D GCC, driving cutting-edge innovation in automotive safety, advanced microcontrollers, and edge-AI processing silicon. This role is anchored out of our client's premier Delhi-NCR design capitals, with flexible multi-site alignment options for their existing engineering hubs in Bengaluru and Hyderabad.

Target Level & Seniority: Staff / Technical Lead (8–12+ Years)

Key Professional Responsibilities:

1. Drive high-level microarchitecture definition, functional block specification convergence, and RTL execution for complex SoC subsystems and top-level assemblies.
2. Integrate advanced multi-layered AMBA bus architectures (AXI, AHB, APB) and scalable Network-on-Chip (NoC) interconnect technologies.
3. Implement hardware-level functional safety mechanisms, including Error Correcting Code (ECC), hardware checkers, and parity redundancy compliant with automotive safety lifecycles (ISO 26262 / ASIL-D).
4. Own frontend quality sign-offs, executing design feasibility assessments, linting, and structural clock/reset analysis across cutting-edge technology nodes (28nm FDSOI down to FinFET 7nm).

Core Technical Competencies Required:

1. Core Design & Modeling: Verilog, SystemVerilog, AMBA Bus Protocols (AXI/AHB/APB), Arteris NoC or similar complex interconnect fabrics.
2. Compliance Standards: ISO 26262 functional safety lifecycles, ARM/RISC-V architecture specifications, and custom memory subsystem controls (Flash, RAM, DDR).
3. Quality Sign-off Platforms: Synopsys SpyGlass (Lint/CDC), Cadence JasperGold.

Confidentiality Assured: At Screen2Hire, we understand the specialized nature of the VLSI ecosystem. If you are a passive candidate exploring the NCR market and want a confidential career mapping discussion before applying formally, please reach out directly to our principal desk at vikas.sharma@screen2hireconsulting.com.