Lead IC Package Engineer

Job Description

We are looking for an experienced Lead IC Package Engineer to join a leading semiconductor engineering team in Bangalore. This role is ideal for professionals with extensive experience in IC Package Layout Design, high-speed package routing, and advanced semiconductor packaging technologies.

You will be responsible for designing complex package layouts, ensuring compliance with design rules, collaborating with cross-functional engineering teams, and delivering manufacturable package solutions for next-generation semiconductor products.

Key Responsibilities

1. Design and develop complex IC package layouts for semiconductor devices across multiple applications.
2. Execute constraint-driven package layout design while meeting electrical, mechanical, and manufacturing requirements.
3. Perform high-speed routing for interfaces including:
4. PCIe
5. DDR Memory
6. UFS
7. GPIO
8. Apply Signal Integrity (SI) and Power Integrity (PI) routing guidelines during package layout.
9. Conduct package layout reviews with design and layout teams.
10. Perform Design Rule Checks (DRC) and ensure compliance with package design standards.
11. Generate Gerber files and perform validation using CAM350.
12. Ensure package designs meet Design for Manufacturing (DFM), Design for Assembly (DFA), and Design for Test (DFT) guidelines.
13. Release package layout documentation and coordinate with cross-functional engineering teams.
14. Work closely with customers and internal stakeholders throughout the package development cycle.

Required Skills

1. 10+ years of experience in IC Package Layout Design.
2. Strong hands-on experience with Cadence Allegro Package Designer (APD 17.4 or later).
3. Experience designing Flip-Chip BGA and Wire Bond BGA packages.
4. Strong understanding of:
5. Signal Integrity (SI)
6. Power Integrity (PI)
7. High-Speed Routing Guidelines
8. Experience routing high-speed interfaces such as:
9. PCIe
10. DDR
11. UFS
12. GPIO
13. Experience performing:
14. Design Rule Checks (DRC)
15. Gerber generation
16. CAM350 validation
17. Good understanding of:
18. DFM
19. DFA
20. DFT
21. Excellent analytical, communication, and problem-solving skills.
22. Ability to work independently as well as collaboratively within cross-functional teams.

Preferred Skills

1. Experience with Mentor HyperLynx or equivalent SI/PI validation tools.
2. Exposure to advanced semiconductor package development methodologies.
3. Customer-facing experience in package design projects.
4. Experience leading package layout activities for complex semiconductor programs.

Education

1. Bachelor's Degree in Electronics & Communication Engineering (ECE), Electrical & Electronics Engineering (EEE), or a related discipline.