Job Description
Our client is a world-class Electronic Design Automation (EDA) and Silicon IP product giant, engineering the core software tools and verification IPs that power the global semiconductor ecosystem.
Key Professional Responsibilities:
- Serve as the regional technical authority providing post-sales consultation and troubleshooting for enterprise engineering groups executing hyper-advanced sub-10nm chip tape-outs.
- Diagnose and solve highly complex, multi-variable customer design anomalies related to Physical Design closure, Power Integrity (IR Drop, EM analysis), or Static Timing Analysis.
- Educate and lead strategic tier-1 semiconductor accounts on optimal design methodologies, script custom automation fixes, and safely drive tool deployment models.
- Synthesize client product gaps, bugs, and feature requirements, funneling actionable metrics back to internal core software R&D engineering groups.
Core Technical Competencies Required:
- EDA Tool Suite Ecosystems: Hands-on mastery of Cadence Suites (Innovus, Genus, Tempus, Voltus) or Synopsys equivalents (IC Compiler, PrimeTime, StarRC).
- Domain Technical Depth: Advanced Physical Design closure paradigms, EMIR (Electromigration & IR Drop Analysis), Static Timing Analysis (STA), and Power Delivery Network (PDN) design.
- Automation Architecture: Tcl, Perl, and Python scripting for dynamic tool manipulation.
Confidentiality Assured: At Screen2Hire, we understand the specialized nature of the VLSI ecosystem. If you are a passive candidate exploring the NCR market and want a confidential career mapping discussion before applying formally, please reach out directly to our principal desk at vikas.sharma@screen2hireconsulting.com.